2018 Single Event Effects Symposium and Military and Aerospace Programmable Logic Devices Workshop

2018 SEE/MAPLD Final Agenda

Sunday - May 20th, 2018 Welcome to the SEE/MAPLD Workshop
5:00:00 PM	Workshop Registration and Registration Reception Soledad Ballroom 5:00 PM - 8:00 PM
8:00:00 PM	End of Registration Reception

Monday - May 21st, 2018 Single Event Effects (SEE) Sessions
Start Time	Session	Talk
7:00:00 AM	Registration in Salon A Foyer 7:00 AM - 4:00 PM
8:00:00 AM	Introduction	Opening Remarks and SEE Session Introduction
8:20:00 AM	Invited Talk: (40 mins)	NASA Space Radiation Laboratory (NSRL) Facility Mike Sivertz, NSRL
9:00:00 AM	Facilities Chair: John Bird, Radiation Test Solutions	K150 Radiation Effects Facility at Texas A&M Henry Clark, Cyclotron Institute / Texas A&M
9:20:00 AM	Memories Chair: Greg Allen, JPL	Impact of the Elemental Makeup of an IC in Generating Single-Event Upsets from Low Energy Neutrons Peter Conway, NSWC Crane
9:40:00 AM	Memories Chair: Greg Allen, JPL	Modern Microprocessor SEE Testing Steven Guertin, JPL
10:00:00 AM	Break (30 mins)
10:30:00 AM	Memories (cont.)	Isolating Memory Arrays in SEE Testing of Commercial Memory Components Steven Guertin, JPL
10:50:00 AM		Heavy-ion Induced Stuck Bits and SEL Test Results on DDR3 SDRAM Memories Pierre Kohler, 3D PLUS
11:10:00 AM		A First Look at 22 nm FDSOI SRAM Single-Event Test Results Megan Casey, NASA/GSFC
11:30:00 AM		Tales from the Cave: The Impact of DUT Thickness Non-uniformity on SEE Data Quality Gary Swift, Swift Engineering & Radiation Services, LLC
11:50:00 AM	Lunch (1 hour & 20 mins) 11:50AM - 1:10 PM
1:10:00 PM	Characterization & Analysis Chair: Megan Casey, NASA/GSFC	Characterizing Radiation Effects on Satellites with the Space Ionizing Radiation Environment and Effects (SIRE2) Toolkit Jim Adams, Fifth Gait Technologies, Inc.
1:30:00 PM		Percolation Description of SEE Cross Sections Larry Phair, LBNL
1:50:00 PM		A Novel Approach to Single Event Reliability Prediction Melanie Berg, AS&D / GSFC
2:10:00 PM		Correlation of Single-Board Computer Ground-Test Data and On-Orbit Upset Rates from the Gaia Mission David Hansen, Data Devices Corporation
2:30:00 PM		Results of a Study of Single Event Transients in GaN HEMTs Using Several Different Radiation Sources and Device Structures Steve Buchner, NRL
2:50:00 PM	Break (30 mins)
3:20:00 PM	Invited Talk: (40 mins)	AE-9/AP-9 Environment Model Update Tim Guild, The Aerospace Corporation
4:00:00 PM	Emerging Technologies Chair:John Stone, SwRI	SEE Testing of Renesas' Intersil GaN Family of Products Kiran Bernard, Renesas Electronics America, Inc.
4:20:00 PM		Single Event Effects in Commercial-off-the-Shelf FinFET Devices Dobrin Bossev, NSWC Crane
4:40:00 PM		Effects of Heavy Ion Radiation in Novel Silicon Carbide Integrated Circuits Akin Akturk, CoolCAD Electronics, LLC
5:00:00 PM	End of Monday Sessions

Tuesday - May 22nd, 2018 SEE Sessions (cont.) and Combined SEE/MAPLD Sessions
Start Time	Session	Talk	Event
7:00:00 AM	Registration in Conference Office 7:00 AM - 4:00 PM
7:20:00 AM	Tutorial (1 Hour)	Single Event Effects Testing Tutorial: Planning and Execution Basics Ken LaBel & Jonny Pellish, NASA/GSFC Located in the Los Angeles/Rancho Las Palmas Room	Industrial Exhibit Chair: Teresa Farris, Cobham Semiconductor
8:30:00 AM	Introduction	Meeting Announcements
8:40:00 AM	Invited Talk: (40 mins)	Model-Based Mission Assurance Brian Sierawski, Vanderbilt University
9:20:00 AM	Flash & Computing Chair:Jonny Pellish, NASA/GSFC	Progress Toward Establishing Correlation Between Heavy-Ion and Pulsed-Laser Induced Single Event Effects Dale McMorrow, NRL
9:40:00 AM	Flash & Computing Chair:Jonny Pellish, NASA/GSFC	COTS 3D NAND Flash: SEE Test Results and Challenges Ted Wilcox, NASA/GSFC
10:00:00 AM	Break (30 mins)
10:30:00 AM	Flash & Computing (cont.)	Single Event Effect Hardness of an 8Mbit 40nm CMOS Technology based SONOS NOR Flash Helmut Puchner, Cypress Semiconductor
10:50:00 AM		The High Performance Spaceflight Computing (HPSC) Chiplet Development Program Jon Ballast, Boeing
11:10:00 AM		Proton-Induced Classification Changes in a Neuromorphic Computing System Rachel Brewer, Vanderbilt University
11:30:00 AM	FPGAs Chair: Keith Avery, AFRL	Virtex-5QV FPGA in High Radiation Environment LeeAnne Raczcowski, BAE
11:50:00 AM	Lunch ( 1 hour & 20 mins) 11:50 AM - 1:10 PM
1:10:00 PM	FPGAs (cont.)	SEU Neutron Radiation Beam Results for Xilinx’s UltraScale+ MPSoC Mike Wirthlin, Brigham Young University
1:30:00 PM	FPGAs (cont.)	Neutron and Proton Induced Single Event Effects on Microsemi PolarFire SONOS-based FPGA Nadia Rezzak, Microsemi-SoC
Combined SEE/MAPLD Sessions Begin
1:50:00 PM	Introduction	Combined Session Introduction
2:10:00 PM	Invited Talk: (40 mins)	New Developments in Error Detection and Correction Strategies for Critical Applications Melanie Berg, AS&D / GSFC
2:50:00 PM	Break (30 mins)
3:20:00 PM	Mitigation Strategies Chair: Krzysztof Sielewicz, Warsaw University of Technology	Increasing the Effectiveness of TMR through Low-Level Implementation on SRAM FPGAs Matthew Cannon, Brigham Young University
3:40:00 PM		Application of TMR on IP Based Designs Using a New Flow Kamesh Ramani, Mentor Graphics - A Siemens Business
4:00:00 PM		ESA Study on FPGA HLS Design-Flow and Mitigation Techniques Work Updates David Merodio-Codinachs, ESA
4:20:00 PM	End of Tuesday Sessions
5:00:00 PM	Registration in Conference Office 5:00 PM - 6:00 PM
5:30:00 PM	Industrial Exhibit Reception 5:30 - 8:00 PM
8:00:00 PM	End of Industrial Exhibit Reception

Wednesday - May 23rd, 2018 MAPLD Sessions
Start Time	Session	Talk	Event
7:00:00 AM	Registration in Conference Office 7:00 AM - 4:00 PM
7:20:00 AM	Tutorial (1 Hour)	FPGA Basics and FPGA SEE Testing Nadia Rezzak, Microsemi-SoC Located in the Los Angeles/Rancho Las Palmas Room	Industrial Exhibit
8:30:00 AM	Introduction	MAPLD Session Introduction
8:40:00 AM	Invited Talk: (40 mins)	An Informal Introduction to Autonomous Driving Dr. Xiaodi Hou, TuSimple
9:20:00 AM	Automotive Chair: Rosario Cammarota, Qualcomm	Functional Safety and Space Electronics Ann Keffer, Cadence Design Systems
9:40:00 AM		Formal Sequential Equivalence Checking for Highly-Optimized Safety-Critical FPGAs David Landoll, OneSpin Solutions
10:00:00 AM	Break (30 mins)
10:30:00 AM	Invited Talk: (40 mins)	SER Qualification and Radiation Effects Implications for Functional Safety in Automotive Electronics Jyotika Athavale, Intel
11:10:00 AM	New Devices Chair: David Merodio-Codinachs, ESA	Embedded FPGA (eFPGA) for Processor and Algorithm Acceleration Steve Mensor, Achronix Semiconductor Corp.
11:30:00 AM		AI Feature Extraction Using Low Power eFPGAs Tim Saxe, QuickLogic, Inc.
11:50:00 AM	Lunch (1 hour & 20 mins) 11:50 AM - 1:10 PM
Industrial Exhibit Ends
1:10:00 PM	FPGA Design Chair:Marco Figueiredo, Orbital ATK/GSFC	Build and Debug Highly Reliably FPGA-based Designs Paul Owens, Synopsys
1:30:00 PM		Improve Your FPGA Design Reliability by Using CDC Custom Synchronizers Dominic Lucido, Mentor - A Siemens Business
1:50:00 PM		New RHBD FPGA Vendor for Space borne Applications: Product Roadmap & 1st Radiation Results Joel LeMauff, NanoXplore SAS
2:10:00 PM		High Performance Space Data Acquisition and Compression with Embedded System-on-Chip Instrument Avionics for Space-based Next Generation Imaging Spectrometers (NGIS) Didier Keymeulen, JPL
2:30:00 PM	SpaceVPX Chair: Renee Reynolds, NASA/GSFC	A High Availability, High Reliability SpaceVPX System Steve Parkes, Star-Dundee & University of Dundee
2:50:00 PM	Break (30 mins)
3:20:00 PM	SpaceVPX (cont.)	RC64_ High Performance Rad-Hard Manycore for Telecomm Satellites Applications on a VPX system Fredy Lange, Ramon Chips
3:40:00 PM		SpaceVNX: A Path Towards Reliable High-Performance Computing in Small Satellites Jorge Piovesan, IDEAS Engineering and Technology, LLC
4:00:00 PM		3U SpaceVPX Platform for Advanced Parallel RF Processing Hardware for SWAP-C Payloads Drew Boudreau, Trident Systems, Inc.
4:20:00 PM		End of Wednesday Sessions
5:00:00 PM	Poster Session and Happy Hour Begins
5:00:00 PM TO 8:00:00 PM	Poster Session Chair: Martha O'Bryan, AS and D, Inc. / NASA GSFC	New RHBD FPGA Vendor for Spaceborne Applications: Product Roadmap & 1st Radiation Results Joel LeMauff, NanoXplore SAS
		Single-Event Characterization of the 16 nm FinFET Xilinx Kintex UltraScale+ in Heavy Ions David Lee, Sandia National Labs
		V2: Using Advanced Verification to Close the Verification Productivity Gap in DO-254 Applications Brian Mathewson, Mentor - A Siemens Business
		Accelerate your FPGA Design Closure with Advanced Static Verification Shylaja Sen, Synopsys
		Hardware Trojan Detection Work Instruction Vikram Rao, The Aerospace Corporation
		Silicon Carbide SiC Mask Programmable Gate Array MPGA for Space Commercial & industrial Applications Peter Ateshian, Naval Postgraduate School
		Standardizing GPU Radiation Test Approaches – Part 2 Edward Wyrwas, Lentech, Inc. / GSFC
		Key Aspects to Consider When Using FPGA Synthesis Tool on a DO-254 Design Kamesh Ramani, Mentor - A Siemens Business
		Mitigating Single Event Effects to Meet Functional Safety Standards David Landoll, OneSpin Solutions
		Prompt Dose Radiation Testing on Mixed Signal Telemetry LX7730 Controller Mathieu Sureau, Russell Stevens, Nadia Rezzak, Kathy Zhang, Allen Fan, Microsemi
		Detecting Microelectronic Modification Through Power Emissions Jesse Theiss, The Aerospace Corporation
		Materials Properties Relevant to Photon-Based SEE Testing of Semiconductor Devices Steven Moss, The Aerospace Corporation
		Proton Facility Update Ken LaBel, NASA/GSFC
8:00:00 PM	End of Poster Session and Happy Hour

Thursday - May 24th, 2018 MAPLD Sessions (cont.)
Start Time	Session	Talk
7:45:00 AM	Registration in Conference Office 7:45 AM - 1:00 PM
8:00:00 AM	Introduction	Meeting Announcements
8:20:00 AM	Invited Talk: (40 mins)	Radiation Qualification of Mass Produced Electronic Systems at CERN Slawosz Uznanski, CERN
9:00:00 AM	Assurance Reliability Chair: Brian Cohen, IDA	Automated Formal as an Unbiased Auditor Dominic Lucido, Mentor - A Siemens Business
9:20:00 AM		How to Avoid Metastability on Reset Signal Networks, a/k/a Reset Verification is the New CDC Joe Hupcey III, Mentor - A Siemens Business
9:40:00 AM		RTL Analysis and CDC Analysis for Maximum Design Efficiency and Quality Scott Calkins, Blue Pearl Software
10:00:00 AM	Break (30 mins)
10:30:00 AM	Invited Talk: (40 mins)	Information Leakage and Mitigations: from Smartcards to SoCs Ro Cammarota, Qualcomm
11:10:00 AM	Attacks Chair: Michael Campola, NASA/GSFC	FPGA Bitstream Attack and Mitigation Mark Marson, Rambus, Inc. Cryptology Research Division
11:30:00 AM	Assurance Security Chair: Dominic Lucido, Mentor - A Siemens Business	DoD Field Programmable Gate Array (FPGA) Assurance Activities Brian Cohen, Institute for Defense Analyses
11:50:00 AM	Lunch (1 hour & 20 mins) 11:50 AM- 1:10 PM
1:10:00 PM	Assurance Security (cont.)	Verifying Security Aspects of Programmable Devices Anders Nordstrom, Synopsys
1:30:00 PM		The Need for FPGA Bitstream Verification John Hallman, MacAulay-Brown, Inc.
1:50:00 PM		Automating Information Assurance and Trust Verification Across the Entire Hardware Design Lifecycle Jason Oberg, Tortuga Logic
2:10:00 PM	Invited Talk: (40 mins)	Measuring Trust Jonathan Graf, Graf Research
2:50:00 PM	Open Meeting
3:40:00 PM	End of MAPLD Sessions and Workshop

General Chair: SEE: Jeff George, The Aerospace Corporation / MAPLD: Melanie Berg, AS&D, Inc./NASA Goddard Spaceflight Center
Technical Chair: SEE: Katherine Scott, The Boeing Company / MAPLD: Slawosz Uznanski, CERN
Poster Session Chair: Martha O'Bryan, AS&D, Inc. / NASA Goddard Space Flight Center
Industrial Exhibit Chairwoman: Teresa Farris, Cobham Semiconductor Solutions
Local Arrangements & Registration Services: Susan Hunt, STAMP Services
Website Curator: Carl Szabo, AS&D, Inc. / NASA Goddard Space Flight Center

SEE Symposium and MAPLD are supported by Cobham Semiconductor Solutions, the Aerospace Corporation, Brigham Young University, Lockheed Martin, the NASA Electronic Parts and Packaging Program, the Naval Research Laboratory, Sandia National Laboratories, and Vanderbilt University.

SEE Symposium and MAPLD are sponsored by SEE Symposium, California