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2017 SEE/MAPLD Preliminary Agenda

Sunday - May 21st, 2017
Welcome to the SEE/MAPLD Workshop
5:00:00 PM

Workshop Registration and Registration Reception

Soledad Ballroom

5:00 PM - 8:00 PM
8:00:00 PM End of Registration Reception
Monday - May 22nd, 2017
Single Event Effects (SEE) Sessions
Start Time Session Talk
7:30:00 AM Registration in Salon A Foyer
7:30 AM - 5:00 PM
8:20:00 AM Introduction
Opening Remarks and SEE Session Introduction
8:40:00 AM SEE Test Methodology
and Assurance
Chair: TBD
Invited Talk:(40 mins) Proton Testing:
Opportunities, Pitfalls and Puzzles
Ray Ladbury, NASA/GSFC
9:20:00 AM Inclusion of Radiation Effects in the
NASA Reliability & Maintainability Standard
Rebekah Austin, Vanderbilt University
9:40:00 AM Radiation Hardness Assurance (RHA):
Challenges and New Considerations
Michael Campola, NASA/GSFC
10:00:00 AM Break (30 mins)
10:30:00 AM SEE Test Methodology
and Assurance (cont.)
Chair: TBD
Common Issues Related to the Preparation of Modern Microelectronics for Heavy Ion Testing, with an Emphasis on
Commercial off-the-Shelf (COTS) Devices
Greg Allen, Jet Propulsion Laboratory
10:50:00 AM Methodology for SEE Testing on FPGAs through Two-Photon Absorption Laser Testing
Matthew Cannon, Brigham Young University
11:10:00 AM Two-Photon Absorption Induces SEE:
Experimental Validation of Nonlinear-Optical Models
Dale McMorrow, Naval Research Laboratory
11:30:00 AM Considerations for GPU SEE Testing
Edward Wyrwas, Lentech / GSFC
11:50:00 AM Lunch (1 hour & 20 mins)

11:50AM - 1:10 PM
1:10:00 PM SEE Characterization
and Analysis
Chair: TBD
Invited Talk:(40 mins) Balancing Science
and SEE at the TAMU Cyclotron
Henry Clark, Texas A&M University
1:50:00 PM Review and Analysis of Single-Event Testing Results Effects in Gallium Nitride Power HEMTs
Leif Scheick, Jet Propulsion Laboratory
2:10:00 PM SEE Testing of AlGaN/GaN HEMTs Using Different Radiation Sources
Stephen Buchner, Naval Research Laboratory
2:30:00 PM The Effect of X-ray Photon Energy on Charge
Collection Measurements in AlGaN/GaN MISFETS
Stephen LaLumondiere, The Aerospace Corporation
2:50:00 PM Break (30 mins)
3:20:00 PM SEE Characterization
and Analysis (cont.)
Invited Talk:(40 mins) Present and future prospects
for SEE studies at the Advanced Photon Source
Steve Heald, Argonne National Laboratory
4:00:00 PM Single Event Induced Vt Shift in Flash Cells of Flash-Based FPGA
Jih-Jong Wang, Microsemi-SoC
4:20:00 PM Analysis of Rad-Hard STT-RAM Read/Write Circuits
under Gamma and Neutron Radiation
Saba Mohammadi, University of California Irvine
4:40:00 PM Single-Event Threats for Diodes – It’s Not Just Schottky Diodes
Megan Casey, NASA/GSFC
5:00:00 PM End of Monday Sessions
Tuesday - May 23th, 2017
SEE Sessions (cont.) and Combined SEE/MAPLD Sessions
Start Time Session Talk Event
8:00:00 AM Registration in Conference Office
8:00 AM - 5:00 PM
8:30:00 AM Introduction
Meeting Announements Industrial Exhibit

Chair:
Teresa Farris, Cobham Semiconductor
8:40:00 AM SEE: Processors
and SoCs
Chair:TBD
Invited Talk: (40 mins) The Evolution of CREME
for Radiation Effects Analyses
Brian Sierawski, Vanderbilt University
9:20:00 AM Snapdragon 820 SEE Testng and On-Site Stuck Bit Mitigation
Steven Guertin, Jet Propulsion Laboratory
9:40:00 AM Characterization of System on a Chip (SoC) Single Event Upset (SEU) Responses using SEU Data, Classical Reliability
Models, and Space Environment Data
Melanie Berg, AS&D / GSFC
10:00:00 AM Break (30 mins)
10:30:00 AM
SEE: Processors
and SoCs
(cont.)
Study on Single Event Effects in 28nm System-on-Chip
Chaohui He, Xi'an Jiaotong University
 
10:50:00 AM The Long and Winding Road: Summarizing the 7-Series (28nm) "Micro-"Latchup Investigations in Light of Recent Laser Results
Gary Swift, Swift Engineering
& Radiation Services, llc
11:10:00 AM Invited Talk: (40 mins) TBD
TBD
11:50:00 AM Lunch ( 1 hour & 20 mins)

11:50 AM - 1:10 PM
Combined SEE/MAPLD Sessions Begin
1:10:00 PM FPGAs: SEEs,
Testing & RHA
Chair: TBD
NASA Electronic Parts and Packaging (NEPP) Independent Single Event Upset Testing of the Microsemi RTG4 and Xilinx Kintex-Ultrascale Field Programmable Gate Arrays
Melanie Berg, AS&D / GSFC
 
1:30:00 PM Neutron and Heavy Ion SEE testing of
Microsemi SmartFusion2 FPGA
Nadia Rezzak, Microsemi-SoC
1:50:00 PM BRAVE FPGA update: radiation results of
NG-MEDIUM and NG-LARGE introduction
David Merodio-Codinachs, European Space Agency
2:10:00 PM XRTC Happenings: Still Testing after All These Years
Gary Swift, Swift Engineering
& Radiation Services, llc
2:30:00 PM
Mitigation Tools

Chair: TBD

Building Highly Reliably FPGA-based Designs
Joe Mallett, Synopsys
2:50:00 PM Break (30 mins)
3:20:00 PM Mitigation Tools (cont.) Radiation-induced SET on Flash-based FPGAs:
Analysis and Filtering Methods
Luca Sterpone, Politecnico di Torino
 
3:40:00 PM Invited Talk: (40 min) New Developments in Error Detection and Correction Strategies for Critical Applications
Melanie Berg, AS&D / GSFC
4:20:00 PM End of Tuesday Sessions
5:30:00 PM Industrial Exhibit Reception

5:30 - 8:00 PM
8:00:00 PM End of Industrial Exhibit Reception
Wednesday - May 24th, 2017
Combined SEE/MAPLD Sessions (cont.) and MAPLD Sessions
Start Time Session Talk Event
8:00:00 AM Registration in Conference Office
8:00 AM - 5:00 PM
8:30:00 AM Introduction Meeting Announements Industrial Exhibit
8:40:00 AM

Mitigation Tools (cont.)

Exhaustively Verify SEU Mitigation
Techniques Using Formal Verification
Joe Hupcey III, Mentor Graphics
9:00:00 AM Evaluating the Reliability of New FPGA
Architectures Using Benchmark Designs
Andrew Keller, Brigham Young University
9:20:00 AM A New EDA Flow for The Mitigation of SEUs
in Dynamic Reconfigurable FPGAs
Luca Sterpone, Politecnico di Torino
MAPLD Sessions Begin
9:40:00 AM Introduction MAPLD Introduction  
10:00:00 AM Break (30 mins)
10:30:00 AM FPGA Design
and Verification
Chair: TBD
SoC Readiness: The 6 Steps to Up-level Your Verification Team’s Practices for the Coming Wave of SoCs
Steve Carlson, Cadence
 
10:50:00 AM Coverage-driven Clock Domain Crossing (CDC) Verification Enables DO- 254 Safety-critical Designs
Kurt Takara, Mentor Graphics
11:10:00 AM 3:Quality Gap: Best Practices in Commercial SoC Verification Versus Common Programmable Device Flows
Steve Carlson, Cadence
11:30:00 AM RTL Static Verification and DO-254 Safety Compliance for FPGA-Based Designs
Kiran Vittal, Synopsys
11:50:00 AM Lunch (1 hour & 20 mins)

11:50 AM - 1:10 PM
1:10:00 PM Industrial Exhibits Close
1:10:00 PM FPGA Experiences
and Systems
Chair: TBD
Invited Talk: (40 mins) Mission Use of the SpaceCube Hybrid Data Processing System
David Petrick, NASA/GSFC
1:50:00 PM HIPNOS: Evaluation of Computing Platforms and Accelerators
for High-Performance Avionics in Space
Georgios Lentaris, National Technical University of Athens, Greece
2:10:00 PM Experience with the Virtex-5QV with AXI MicroBlaze
processor for Wide-band RF Detection
Zachary Baker, Los Alamos National Laboratory
2:30:00 PM A Versatile Spacewire and Spacefiber Development Board
for the Microsemi RTG4 FPGA
Steve Parkes, STAR-DUNDEE & University of Dundee
2:50:00 PM Break (30 mins)
3:20:00 PM FPGA Experiences
and Systems
(cont.)

Open ESA FPGA Benchmark Suite
Thomas Lange, ESA / ESTEC

3:40:00 PM Trust
Chair: TBD
Invited Talk: (40 mins) Field Programmable Gate Array (FPGA) Assurance
Brian Cohen, Institute for Defense Analyses
4:20:00 PM End of Wednesday Sessions
5:00:00 PM Poster Session and Happy Hour Begins

5:00:00 PM

 

TO

 

8:00:00 PM

Poster Session

Chair: Martha O'Bryan,
AS and D, Inc. /
NASA GSFC
Evaluation of Latent Oxide Defects in High Voltage
Transistors Irradiated with Au Ions.
Matt VonThun, Cobham Semiconductor Solutions
Characterization and mitigation of Single Event Transients in Xilinx 45 nm SRAM-based FPGA with low flux alpha particles
Eitan Keren, Soreq Nuclear Research Center
Hardware Trojan Horse Detection
Vikram Rao, The Aerospace Corporation
Customizing medical proton therapy pencil beam scanning for SEE testing
Lei Dong, University of Pennsylvania
SEE Testing at the Cincinnati Proton Therapy Center
Abram Gordon, Cincinnati Children's Hospital Medical Center
The Great Proton Search Continues
Ken LaBel, NASA/GSFC
Expanded P2020 SEE Testing - Ethernet, Watchdog, and Static Debugger
Stephen Guertin, Jet Propulsion Laboratory
Single Event Effects Hardening and Testing on Mixed Signal Telemetry LX7730 Controller
Katherine Zhang, Microsemi
SEE Testing of Intersil's Radiation Tolerant Plastic Products
Kiran Bernard, Intersil
TMR SPI Nor Memory for FPGA Bitstream
Pierre-Xiao Wang, 3D-Plus
Configurable processors roles in security
Steve Carlson, Cadence
8:00:00 PM End of Poster Session and Happy Hour
Thursday - May 25th, 2017
MAPLD Sessions (cont.)
Start Time Session Talk
8:00:00 AM Registration in Conference Office
8:00 AM - 1:00 PM
8:30:00 AM Introduction
Meeting Announcements
8:40:00 AM Trust
Chair: TBD
Invited Talk: (40 min) Title TBD
Aman Gahoonia
9:20:00 AM Microsemi Trusted FPGA
Paul Quintana, Microsemi
9:40:00 AM New and Emerging Technologies for Trust
Steve Carlson, Cadence
10:00:00 AM Break (30 mins)
10:30:00 AM Trust (cont.)
Security path verification: exhaustive, formal technology
Steve Carlson, Cadence
10:50:00 AM Automating Hardware Security Review for FPGA-based Designs
Jason Oberg, Tortuga Logic, Inc.
11:10:00 AM Integrated Circuit Lifecycle Security Best Practices
Vikram Rao, The Aerospace Corporation
11:30:00 AM Optimizing Forward Design Trust for FPGAs
Jonathan Graf, Graf Research
11:50:00 AM Lunch (1 hour & 20 mins)

11:50 AM- 1:10 PM
1:10:00 PM SpaceVPX
Chair: TBD
SpaceVPX (VITA 78) – A Standard for High
Performance Space Computing Applications
Charles Collier, US Navy
1:30:00 PM A SWAP-C Minimal SpaceVPX Approach for Small Spacecraft Payloads
H. Scott Goedeke, Northrop Grumman Electronic Systems
1:50:00 PM Data Flow and Storage Building Blocks for a SpaceVPX Architecture
David Matthes, BAE Systems
2:10:00 PM Adaptable Onboard Processing Building Blocks using Interoperable Reconfigurable Computing Modules
Joseph Marshall, BAE Systems
2:30:00 PM A SpaceVPX-Lite Demonstration System Using Spacefibre
as the Data and Control Plane
Steve Parkes, STAR-DUNDEE & University of Dundee
2:50:00 PM End of MAPLD Sessions and Workshop
Contact Us

General Chair: SEE Symposium - Steve Guertin, NASA Jet Propulsion Laboratory / MAPLD - Deanna Donner, Lockheed Martin
Technical Program Chair: SEE Symposium - Jeff George, The Aerospace Corporation / MAPLD - David Merodio Codinachs, European Space Agency
Poster Session Chair: Martha O'Bryan, AS&D, Inc. / NASA Goddard Space Flight Center
Industrial Exhibit Chairwoman: Teresa Farris, Cobham Semiconductor Solutions
Local Arrangements & Registration Services: Susan Hunt, STAMP Services
Website Curator: Carl Szabo, AS and D, Inc. / NASA Goddard Space Flight Center

SEE Symposium and MAPLD are supported by Cobham Semiconductor Solutions, the Aerospace Corporation, Brigham Young University, Lockheed Martin, the NASA Electronic Parts and Packaging Program, the Naval Research Laboratory, Sandia National Laboratories, and Vanderbilt University.

SEE Symposium and MAPLD are sponsored by SEE Symposium, California